Table of Contents

Although it has brought about a revolution in the design of electronic equipment, the bipolar (PNP/NPN) transistor still has one very undesirable characteristic. The low input impedance associated with its base-emitter junction causes problems in matching impedances between interstage amplifiers.

For years, scientists searched for a solution that would combine the high input impedance of the vacuum tube with the many other advantages of the transistor. The result of this research is the FIELD- EFFECT TRANSISTOR (FET). In contrast to the bipolar transistor, which uses bias current between base and emitter to control conductivity, the FET uses voltage to control an electrostatic field within the transistor. Because the FET is voltage-controlled, much like a vacuum tube, it is sometimes called the "solid-state vacuum tube."


The elements of one type of FET, the junction type (JFET), are compared with the bipolar transistor and the vacuum tube in Figure 1. As the figure shows, the JFET is a three-element device comparable to the other two. The "gate" element of the JFET corresponds very closely in operation to the base of the transistor and the grid of the vacuum tube. The "source" and "drain" elements of the JFET correspond to the emitter and collector of the transistor and to the cathode and plate of the vacuum tube.

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Figure 1. Comparison of JFET, transistor, and vacuum tube symbols.

The construction of a JFET is shown in Figure 2. A solid bar, made either of N-type or P-type material, forms the main body of the device. Diffused into each side of this bar are two deposits of material of the opposite type from the bar material, which form the "gate." The portion of the bar between the deposits of gate material is of a smaller cross section than the rest of the bar and forms a "channel" connecting the source and the drain. Figure 2 shows a bar of N-type material and a gate of P-type material. Because the material in the channel is N-type, the device is called an N-channel JFET.

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Figure 2. JFET structure.

In a P-channel JFET, the channel is made of P-type material and the gate of N-type material. In Figure 3, schematic symbols for the two types of JFET are compared with those of the NPN and PNP bipolar transistors. Like the bipolar transistor types, the two types of JFET differ only in the configuration of bias voltages required and in the direction of the arrow within the symbol. Just as it does in transistor symbols, the arrow in a JFET symbol always points towards the N-type material. Thus the symbol of the N-channel JFET shows the arrow pointing toward the drain/source channel, whereas the P-channel symbol shows the arrow pointing away from the drain/source channel toward the gate.

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Figure 3. Symbols and bias voltages for transistors and JFET.

The key to FET operation is the effective cross-sectional area of the channel, which can be controlled by variations in the voltage applied to the gate. This is demonstrated in the figures which follow.

Figure 4 shows how the JFET operates in a zero gate bias condition. Five volts are applied across the JFET so that current flows through the bar from source to drain, as indicated by the arrow. The gate terminal is tied to ground. This is a zero gate bias condition. In this condition, a typical bar represents a resistance of about 500 ohms. A milliammeter, connected in series with the drain lead and dc power, indicates the amount of current flow. With a drain supply (VDD) of 5 volts, the milliammeter gives a drain current (ID) reading of 10 milliamperes. The voltage and current subscript letters (V DD, ID) used for an FET correspond to the elements of the FET just as they do for the elements of transistors.

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Figure 4. JFET operation with zero gate bias.

In figure 3-48, a small reverse-bias voltage is applied to the gate of the JFET. A gate-source voltage (VGG) of negative 1 volt applied to the P-type gate material causes the junction between the P- and N-type material to become reverse biased. Just as it did in the varactor diode, a reverse-bias condition causes a "depletion region" to form around the PN junction of the JFET. Because this region has a reduced number of current carriers, the effect of reverse biasing is to reduce the effective cross-sectional area of the "channel." This reduction in area increases the source-to-drain resistance of the device and decreases current flow.

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Figure 5. JFET with reverse bias.

The application of a large enough negative voltage to the gate will cause the depletion region to become so large that conduction of current through the bar stops altogether. The voltage required to reduce drain current (ID) to zero is called "pinch-off" voltage and is comparable to "cut-off" voltage in a vacuum tube. In figure 3-48, the negative 1 volt applied, although not large enough to completely stop conduction, has caused the drain current to decrease markedly (from 10 milliamperes under zero gate bias conditions to 5 milliamperes). Calculation shows that the 1-volt gate bias has also increased the resistance of the JFET (from 500 ohms to 1 kilohm). In other words, a 1-volt change in gate voltage has doubled the resistance of the device and cut current flow in half.

These measurements, however, show only that a JFET operates in a manner similar to a bipolar transistor, even though the two are constructed differently. As stated before, the main advantage of an FET is that its input impedance is significantly higher than that of a bipolar transistor. The higher input impedance of the JFET under reverse gate bias conditions can be seen by connecting a microammeter in series with the gate-source voltage (V GG), as shown in Figure 6.

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Figure 6. JFET input impedance.

With a VGG of 1 volt, the microammeter reads .5 microamps. Applying Ohm’s law (1V ÷ .5 µA) illustrates that this very small amount of current flow results in a very high input impedance (about 2 megohms). By contrast, a bipolar transistor in similar circumstances would require higher current flow (e.g., .1 to −1 mA), resulting in a much lower input impedance (about 1000 ohms or less). The higher input impedance of the JFET is possible because of the way reverse-bias gate voltage affects the cross- sectional area of the channel.

The preceding example of JFET operation uses an N-channel JFET. However, a P-channel JFET operates on identical principles. The differences between the two types are shown in figure Figure 7.

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Figure 7. JFET symbols and bias voltages.

Because the materials used to make the bar and the gate are reversed, source voltage potentials must also be reversed. The P-channel JFET therefore requires a positive gate voltage to be reverse biased, and current flows through it from drain to source.

Figure 8 shows a basic common-source amplifier circuit containing an N-channel JFET. The characteristics of this circuit include high input impedance and a high voltage gain. The function of the circuit components in this figure is very similar to those in a triode vacuum tube common-cathode amplifier circuit. C1 and C3 are the input and output coupling capacitors. R1 is the gate return resistor and functions much like the grid return resistor in a vacuum tube circuit. It prevents unwanted charge buildup on the gate by providing a discharge path for C1. R2 and C2 provide source self-bias for the JFET, which operates like cathode self-bias. R3 is the drain load resistor, which acts like the plate or collector load resistor.

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Figure 8. JFET common source amplifier.

The phase shift of 180 degrees between input and output signals is the same as that of common- cathode vacuum tube circuits (and common-emitter transistor circuits). The reason for the phase shift can be seen easily by observing the operation of the N-channel JFET. On the positive alternation of the input signal, the amount of reverse bias on the P-type gate material is reduced, thus increasing the effective cross-sectional area of the channel and decreasing source-to-drain resistance. When resistance decreases, current flow through the JFET increases. This increase causes the voltage drop across R3 to increase, which in turn causes the drain voltage to decrease. On the negative alternation of the cycle, the amount of reverse bias on the gate of the JFET is increased and the action of the circuit is reversed. The result is an output signal, which is an amplified 180-degree-out-of-phase version of the input signal.


A second type of field-effect transistor has been introduced in recent years that has some advantages over the JFET. This device is the metal oxide semiconductor field effect transistor (MOSFET). The MOSFET has an even higher input impedance than the JFET (10 to 100 million megohms). Therefore, the MOSFET is even less of a load on preceding circuits. The extremely high input impedance, combined with a high gain factor, makes the MOSFET a highly efficient input device for RF/IF amplifiers and mixers and for many types of test equipment.

The MOSFET is normally constructed so that it operates in one of two basic modes: the depletion mode or the enhancement mode. The depletion mode MOSFET has a heavily doped channel and uses reverse bias on the gate to cause a depletion of current carriers in the channel. The JFET also operates in this manner. The enhancement mode MOSFET has a lightly doped channel and uses forward bias to enhance the current carriers in the channel. A MOSFET can be constructed that will operate in either mode depending upon what type of bias is applied, thus allowing a greater range of input signals.

In addition to the two basic modes of operation, the MOSFET, like the JFET, is of either the P-channel type or the N-channel type. Each type has four elements: gate, source, drain, and substrate. The schematic symbols for the four basic variations of the MOSFET are shown in views Figure 9, Figure 10, Figure 11, and Figure 12.

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Figure 9. MOSFET symbols (A).

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Figure 10. MOSFET symbols (B).

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Figure 11. MOSFET symbols (C).

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Figure 12. MOSFET symbols (D).

The construction of an N-channel MOSFET is shown in Figure 13. Heavily doped N-type regions (indicated by the N+) are diffused into a P-type substrate or base. A channel of regular N-type material is diffused between the heavily doped N-type regions. A metal oxide insulating layer is then formed over the channel, and a metal gate layer is deposited over the insulating layer. There is no electrical connection between the gate and the rest of the device. This construction method results in the extremely high input impedance of the MOSFET. Another common name for the device, derived from the construction method, is the insulated gate field effect transistor (IGFET).

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Figure 13. MOSFET structure.

The operation of the MOSFET, or IGFET, is basically the same as the operation of the JFET. The current flow between the source and drain can be controlled by using either of two methods or by using a combination of the two methods. In one method the drain voltage controls the current when the gate potential is at zero volts. A voltage is applied to the gate in the second method. An electric field is formed by the gate voltage that affects the current flow in the channel by either depleting or enhancing the number of current carriers available. As previously stated, a reverse bias applied to the gate depletes the carriers, and a forward bias enhances the carriers. The polarity of the voltages required to forward or reverse bias a MOSFET depends upon whether it is of the P-channel type or the N-channel type. The effects of reverse-bias voltage on a MOSFET designed to operate in the depletion mode are illustrated in Figure 14, Figure 15, and Figure 16. The amount of reverse bias applied has a direct effect on the width of the current channel and, thus, the amount of drain current (ID).

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Figure 14. Effects of bias on N-channel depletion MOSFET (A).

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Figure 15. Effects of bias on N-channel depletion MOSFET (B).

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Figure 16. Effects of bias on N-channel depletion MOSFET (C).

Figure 17, Figure 18, and Figure 19 illustrates the effect of forward bias on an enhancement mode N-channel MOSFET. In this case, a positive voltage applied to the gate increases the width of the current channel and the amount of drain current (ID).

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Figure 17. Effects of bias on N-channel enhancement MOSFET (A).

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Figure 18. Effects of bias on N-channel enhancement MOSFET (B).

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Figure 19. Effects of bias on N-channel enhancement MOSFET (C).

Another type of MOSFET is the induced-channel type MOSFET. Unlike the MOSFETs discussed so far, the induced-channel type has no actual channel between the source and the drain. The induced channel MOSFET is constructed by making the channel of the same type material as the substrate, or the opposite of the source and the drain material. As shown in Figure 20, the source and the drain are of P-type material, and the channel and the substrate are of N-type material.

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Figure 20. Induced channel MOSFET construction.

The induced-channel MOSFET is caused to conduct from source to drain by the electric field that is created when a voltage is applied to the gate. For example, assume that a negative voltage is applied to the MOSFET in figure 3-56. The effect of the negative voltage modifies the conditions in the substrate material. As the gate builds a negative charge, free electrons are repelled, forming a depletion region. Once a certain level of depletion has occurred (determined by the composition of the substrate material), any additional gate bias attracts positive holes to the surface of the substrate. When enough holes have accumulated at the surface channel area, the channel changes from an N-type material to a P-type material, since it now has more positive carriers than negative carriers. At this point the channel is considered to be to inverted, and the two P-type regions at the source and the drain are now connected by a P-type inversion layer or channel. As with the MOSFET, the gate signal determines the amount of current flow through the channel as long as the source and drain voltages remain constant. When the gate voltage is at zero, essentially no current flows since a gate voltage is required to form a channel.

The MOSFETs discussed up to this point have been single-gate MOSFETs. Another type of MOSFET, the dual-gate type, is shown in Figure 21. As the figure shows, the gates in a dual-gate MOSFET can be compared to the grids in a multi-grid vacuum tube. Because the substrate has been connected directly to the source terminal, the dual-gate MOSFET still has only four leads: one each for source and drain, and two for the gates. Either gate can control conduction independently, making this type of MOSFET a truly versatile device.

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Figure 21. Dual-gate MOSFET.

One problem with both the single- and dual-gate MOSFETs is that the oxide layer between gate and channel can be destroyed very easily by ordinary static electricity. Replacement MOSFETs come packaged with their leads shorted together by a special wire loop or spring to avoid accidental damage. The rule to remember with these shorting springs is that they must not be removed until after the MOSFET has been soldered or plugged into a circuit. One such spring is shown in Figure 22.

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Figure 22. MOSFET shorting spring.

What is one of the primary advantages of the FET when compared to the bipolar transistor?


The FET and the vacuum tube have what in common?


The base of a transistor serves a purpose similar to what element of the FET?


What are the two types of JFET?


The source and drain of an N-channel JFET are made of what type of material?


What is the key to FET operation?


What is the normal current path in an N-channel JFET?


Applying a reverse bias to the gate of an FET has what effect?


The input and output signals of a JFET amplifier have what phase relationship?


When compared to the JFET, what is the input impedance of the MOSFET?


What are the four elements of the MOSFET?


The substrate of an N-channel MOSFET is made of what material?


In a MOSFET, which element is insulated from the channel material?


What type of MOSFET can be independently controlled by two separate signals?


What is the purpose of the spring or wire around the leads of a new MOSFET?